Photolithographic processing may be utilized to create a mask that is ultimately used for patterning a semiconductor substrate. Photolithographic processing comprises forming a patterned image of light across a photosensitive material (for instance, photoresist). The light alters exposed regions relative to unexposed regions. Subsequent development of the photosensitive material selectively removes the exposed regions relative to the unexposed regions, or vice versa, to thereby convert the photosensitive material into a patterned mask.
FIG. 1 shows an example prior art wafer 10, and shows a grid 12 across the wafer. The grid represents individual dice that will ultimately be cut from the wafer. Some of the dice are partial dice, and may or may not be utilized. The remaining dice are whole dice, and it may be desired that the whole dice be fabricated identically to one another. Thus, it may be desired to form an identical pattern on each whole die. The patterns may be intricate, and in some applications may comprise a substantial number of repeating units. For instance, the patterns may correspond to memory array patterns, such as patterns corresponding to dynamic random access memory (DRAM) components, Flash memory components (e.g., NAND components), etc.
The wafer 10 comprises a photosensitive material thereon (not shown). Photolithographic processing of the wafer comprises exposure of such photosensitive material to an image corresponding to a positive or negative representation of the desired repeating intricate pattern that is to be formed across the wafer. The image may be created from a single photomask that covers the entire wafer so that one exposure creates an entirety of the image. Alternatively, the image may be created with multiple exposures using a reticle that defines a repeating portion of the image, with such reticle being stepped across the wafer to ultimately create an entirety of the desired image across the wafer.
Regardless of how the image is created across the wafer, there may be undesired variation in the patterns formed across the topography of the wafer. Specifically, dice fabricated in some regions of the wafer may differ from dice fabricated in other regions of the wafer. Such differences may lead to non-uniformity within a production lot of dice. If some of the components formed within the dice are outside of appropriate tolerances, the non-uniformity may lead to unusable parts and associated waste.
FIG. 2 diagrammatically illustrates a pair of regions 14 and 16 that may have variation relative to one another. The region 14 is centrally located on wafer 10, and the region 16 is along the edge of the wafer. Processing utilized to form integrated circuitry across the wafer, and/or to form a photosensitive material on the wafer, may lead to thickness variation across the wafer so that regions 14 and 16 are differently spaced from the optics utilized to form an image during photolithographic processing. Such spacing difference may lead to variation in a pattern formed at region 14 relative to that formed at region 16. Additionally, or alternatively, the fact that region 16 is closer to the edge than region 14 may lead to variation in a pattern formed in region 16 relative to region 14 due to variation in the mechanics or optics utilized to form an image during photolithographic processing. Additionally, or alternatively, undesired variation may be introduced at a processing stage after exposure of the photosensitive material to light.
Regardless of the reason for the variability in the pattern formed across wafer 10, such variability is found to occur, and is problematic. Accordingly, it would be desired to develop methods for addressing such variability.